Reduction of power consumption is a common goal for electronic systems. It is, in general, desirable to reduce power consumed in the transmission of data across busses. Accordingly there is a need in the art for methods and apparatus for reducing power required for transmission of data over busses in system on a chip (SOC) applications.
The teachings of this disclosure are illustrated in terms of an integrated circuit having on chip bus interconnections between electronic units (EU) which reside on the integrated circuit. Electronic units on integrated circuits are commonly coupled to each other by busses. For the purposes of this disclosure a “bus” is defined as a signal conductor or a plurality of conductors used to couple electronic units and transfer data between electronic units. Also for the purposes of this disclosure “electronic unit” is defined to be electronic circuitry which is coupled to other electronic circuitry by one or more buses. As an example a microprocessor or computer (each an electronic unit) may be coupled to a floating point co-processor (another electronic unit) by a data bus.
Modern systems on a chip commonly have a plurality of electronic units coupled by a plurality of buses. Such interconnected systems resemble a quilt which different fabric pieces interconnected by stitches, hence a common term to describe such an interconnected system is “fabric.”
Although the teachings of this disclosure are illustrated in terms of integrated circuits e.g. Systems On a Chip (SOC), the teachings are applicable in other areas. The teachings disclosed should not be construed to be limited to SOC designs or the illustrated embodiments. The illustrated embodiments are merely vehicles to describe and illustrate examples of the inventive teachings disclosed herein.